Performance and correct functionality of integrated circuits (ICs) are linked to the voltage level of the power supply. Coming from a discharged or dead battery, the power supply may take some time to reach an adequate voltage level to provide enough headroom for the sub-circuits to work. The main functionality of a Power-on-reset (POR) circuit is to sense the power supply and to provide a discrete time signal that informs the rest of the sub-circuits when the levels are adequate for proper operation (Vpu) (shown as 102 in FIG. 1). Furthermore, POR circuits can be designed to detect fast undershoots or brownout events in the power supply voltage level that goes below the operational thresholds (Vpd) (shown as 101 in FIG. 1).
FIG. 2 shows a prior art POR circuit (200) that detects the power-up (Vpu) and brownout (Vpd) voltage levels using two comparators (204, 205). The comparators (204, 205) compare two voltages coming from a resistive voltage divider, composed of three resistors (201), (202), and (203), with a fixed voltage reference (vref). The output of each comparator drives a set-reset latch (SR latch) (206) to provide a digital signal that indicates when the power supply is or is not ready for proper operations.
During the power supply ramp-up, comparator cmp_b (205) senses the power supply transition through the voltage node between Rb (202) and Rc (203). This node is compared with the fixed voltage reference, most likely a band-gap voltage reference, flipping the cmp_b output from low to high state and setting the SR latch (206). In parallel, comparator cmp_a (204) flips its output state in a complementary manner. During brownout events, cmp_a (204) detects the ramping down of the supply to reset the SR latch (206). As a result, the output of the POR is flipped, informing the rest of the IC that the voltage level is below the proper level for operations. The window hysteresis can be adjusted by the values assigned to Ra (201), Rb (202), and Rc (203).
The dependency on a fixed voltage reference in the prior art architectures is necessary for the correct functionality of the comparators. The prior art circuit (200) in FIG. 2 does not sense the state of the voltage reference signal Vref and assumes a fixed voltage for power-up comparison. However, this assumption may not be valid, and an inexact comparison may occur if Vref has not fully settled at the comparison time. Furthermore, the SR latch (206) inputs in FIG. 2 lack an initial condition during the power supply ramp-up, and this may corrupt the SR latch (206). Additionally, the prior art architecture (200) in FIG. 2 doesn't consider the non-idealities of resistors Ra (201), Rb (202), and Rc (203), in which the impedance values are a concern when the power supply ramps down at high speed during brownout events.
While the prior art architectures can provide useful power-up and brownout detection circuits, there is still a need for better approaches that can reduce power consumption for low power applications.